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Anti-static Design of Chip

Views: 1364 Update date: Feb 13,2019

With the increase of chip speed and the reduction of signal crosstalk in order to shorten the pin length,

 flip chips are increasingly used in the packaging of ultra-large-scale IC chips such as CPU and System on

 Chip. Flip chips are usually large in area and thin in thickness. According to the formula C=e S/d,

 the chip may carry a large amount of electrostatic charge Q(=CxV). In other words, the chip itself becomes

 a huge capacitor.

If the chip designer does not know enough about this problem and does not set up current release channels 

in the chip, the static charge will accumulate continuously. In this way, when the chip touches the 

workbench or packaging box, it will produce strong static electricity release, so that the chip is damaged in 

the manufacturing process, the yield is reduced, and the production cost is increased.

In addition, the metal caps and radiators on CPU, GPU and Beiqiao chips are also a source of trouble. 

Noda's metal body is like an electrostatic receiving antenna. It is easy to absorb the electric field around the

 chip and the charge on the wire near the chip. This factor also poses a threat to the security of the chip. 

If the chip designer and the whole machine designer fail to take this into account, the loss will be even 

greater when the common problems are found in the hands of users and the product has to be recalled.


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